This application claims priority to German Patent Application No. DE 101 20 790.5, filed Apr. 27, 2001 which is incorporated herein by specific reference.
1. The Field of the Invention
The invention concerns a circuit arrangement to reduce the supply voltage of a circuit part and a process for activating a circuit part supplied with reduced voltage.
2. The Relevant Technology
In electronic circuits the aim is to reduce the power or current consumption. This is the case in particular in modern CMOS circuits in which a high switching speed is offset by a high rest current. Furthermore as a rule a reduced current consumption is required in network-independent, battery- or accumulator-supplied circuits. For this it is known to place unused circuit parts in rest state with reduced voltage supply and hence reduced current consumption.
If a circuit part however has storage cells, their stored data must not be lost. Even in rest state the counter consumption must not fall to zero else the memory content will be lost. In such cases for example it is known from DE 198 11 353 C1 to reduce the supply voltage of the circuit part in rest state in order to achieve a lower current consumption and retain the memory content. For this the local power supply path of the circuit part which can be set into rest state is connected with a global power supply path with switching transistors for low impedance connection of the two power supply paths, to each of which is connected in parallel a transistor diode. As soon as the switching transistors are switched off, the supply current for the circuit part flows through the transistor diodes at which, however, a certain voltage is lost so that the supply voltage of the circuit part and hence its current consumption is reduced.
This solution has in particular the disadvantage that the voltage in the global power supply path fluctuates because of switching processes in other circuit parts and hence can influence the voltage in the local power supply path of the circuit part. This can in particular mean the loss of memory content as at reduced supply voltage in rest state the memory cells have a lower protection against interference. Furthermore disadvantageously in this circuit arrangement there is an increased risk of data loss also during the reactivation process.
If namely at the start of the reactivation process the two switching transistors are closed, the circuit part with the memory cells must be charged to the amount of the voltage in the global power supply path so that a relatively high current flows which at the start of the reactivation process can lead to data loss because of the low interference protection. Furthermore by closing the switching transistors the local power supply path of the circuit part is connected low impedance with the global power supply path so that also current peaks caused by other circuit parts can also lead to data loss in this phase of reduced interference protection.
The present invention is therefore based on the object of creating a circuit arrangement or a process of the type described initially with which a circuit part can be set into rest state and reactivated without the risk of disruptive current or voltage peaks.
According to the invention this task is solved by a circuit arrangement and a process. Advantageous refinements and embodiment forms of the present invention are also described.
The additional rest state power supply path allows essentially better operating conditions to be created for a circuit part in the rest state as the power supply path for the rest state can be designed according to the features necessary for a fault-free rest state independently of the global power supply path. For the global power supply path to supply the active circuit parts usually a low impedance connection is required in order to guarantee a constant power supply even on changing power consumption, and also to allow the supply with increased current to achieve high switch speeds. Such a low impedance design however also transfers current and voltage peaks better and thus with the arrangement known in the state of the art can disrupt circuit parts in the rest state. The additional power supply path for the rest state according to the invention however need not supply high currents and hence can be designed with high impedance so that a better decoupling is achieved from the current and voltage peaks occurring in the circuit.
With the solution according to the invention in general certain circuit parts can be decoupled from a first or the global power supply path and coupled to a second power supply path or the rest state power supply path. If now inactive circuit parts alone are coupled to the second power supply path, on this necessarily essentially fewer current and power peaks occur so that the circuit parts coupled to these are exposed to less disruption. For example these can be general circuit parts which almost must be supplied with voltage even in inactive state, where however interference via the power supply should be avoided.
If on the circuit means for connecting the global power supply path with the rest state power supply path a voltage drop occurs when current is flowing, in this way the supply voltage of circuit part in the rest state can be reduced whereby its power consumption is usually lowered. Such circuit means can for example be transistor diodes, diodes or Zener diodes with which a variable voltage drop can be set. For transistor diodes or diodes, several can be connected in series to achieve a greater voltage drop and hence a lower power supply to the circuit part. Furthermore as circuit means switching transistors can be used where however it must be ensured that the switching transistors must not be closed as at the same time as the first switching means.
Furthermore it is possible to apply a lower voltage to the rest state power supply path so that for the same voltage drop at the second switching means a lower power supply of the circuit part can be achieved. In addition in this way the efficiency of the entire circuit can be increased as the voltage difference between the global and the rest state power supply paths can be created not exclusively via a voltage drop at the circuit means but also in other ways in particular by voltage transformers.
Advantageously the circuit arrangement has second switching means for connecting the global power supply path with the rest power supply path. In this way the interference resistance during the reactivation process can be increased as a circuit part in rest state is first charged with the interference-resistant rest state power supply path by closing the second switching means and then connected with the global power supply path by closing the first switching means. Thus even at the start of the reactivation process where, because of the still low voltage, the interference resistance is less, no current or voltage peaks occurring on the global power supply path can disrupt the circuit.
As soon as the circuit part to be reactivated is adequately charged via the rest state power supply path by closing the second switching means and connected to the global power supply path by closing the first switching means, the second switching means are opened again in order to prevent a low impedance connection of the global power supply path with the rest state power supply path. Otherwise disadvantageously electrical interference from the global power supply path could reach the rest state power supply path and damage circuit parts in rest state.
Advantageously switching means MOS transistors are used as these can be triggered with low power levels and in the controlled open state have a low voltage drop. If the circuit part to be put into rest state is a MOS circuit, switching means designed as MOS transistors can advantageously be integrated on the semi-conductor of the circuit part.